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1 for more information www.linear.com/ltc6261 applic a tions n micropower active filters n portable instrumentation n battery or solar powered systems n automotive electronics n gain bandwidth product: 30mhz n low quiescent current: 240a n op amp drives up to 1nf capacitive loads n offset voltage: 400v maximum n rail-to-rail input and output n supply voltage range: 1.8v to 5.25v n input bias current: 100na maximum n cmrr/psrr: 100db/95db n shutdown current: 10a maximum n operating temperature range: C40c to 125c n single in 6-lead tsot-23, 2mm 2mm dfn packages n dual in 8-lead ms8, ms10, ts0t-23, 2mm 2mm dfn packages n quad in ms16 package t ypic a l applic a tion description 30mhz, 240a power efficient rail-to-rail i/o op amps the lt c ? 6261/ltc6262/ltc6263 are single/dual/quad op - erational amplifiers with low noise, low power, low supply voltage, and rail-to-rail inputs and outputs. they are unity gain stable with capacitive loads up to 1nf . they feature 30mhz gain-bandwidth product, 7v /s slew rate while consuming only 240a of supply current per amplifier operating on supply voltages ranging from 1.8v to 5.25v. the combination of low supply current, low supply voltage, high gain bandwidth product and low noise makes the ltc6261 family unique among rail-to-rail input/output op amps with similar supply current. these operational ampli - fiers are ideal for low power and low noise applications. for applications that require power -down, the l tc6261 and ltc6262 in msop-10 offer shutdown which reduces the current consumption to 10a maximum. the ltc6261 family can be used as plug-in replacements for many commercially available op amps to reduce power and improve input/output range and performance. l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks and over-the-top and c-load are trademarks of analog devices, inc. all other trademarks are the property of their respective owners. low power, low distortion adc driver fe a tures ltc6261 driving ltc2362 adc 626123 ta01b ? + ltc6261 3.3v 3.3v u1 in out 626123 ta01a rf1 1.74k rf2 2.74k cf1 10pf r filt 100 c filt 10nf ltc2362 gnd cs sdo sck ov dd a in v dd v ref ltc6261/ltc6262/ltc6263 626123fa v in = ?1dbfs, 5khz 30 40 50 60 ?120 ?110 ?100 ?90 ?80 ?70 f s = 250ksps ?60 ?50 ?40 ?30 ?20 ?10 0 magnitude (db) snr = 72db thd = ?83.6db sfdr = 86db frequency (khz) 0 10 20
2 for more information www.linear.com/ltc6261 absolute m a xi m u m ra tings supply voltage: v + C v C ........................................... 5. 5v input voltage ................................... v C C 0.2 to v + + 0.2 input current: +in, Cin, shdn (note 2) ............... 1 0ma output current: out ........................................... 20ma output short-circuit duration (note 3) ............ in definite operating temperature range (note 4) ltc6261i/ltc6262i/ltc6263i ............. C 40c to 85c ltc6261h/ltc6262h/ltc6263h ....... C 4 0c to 125c (note 1) top view out ?in shdn v + +in v ? dc package 6-lead (2mm 2mm 0.8mm) plastic dfn 4 5 7 v ? 6 3 2 1 t jmax = 150c, q ja = 80c/w (note 6) exposed pad (pin 7) is v C , must be soldered to pcb top view outa ?ina +ina v ? v + outb ?inb +inb dc package 8-lead (2mm 2mm 0.8mm) plastic dfn 9 v ? 4 1 2 3 6 5 7 8 t jmax = 150c, q ja = 80c/w (note 6) exposed pad (pin 9) is v C , must be soldered to pcb 1 2 3 4 8 7 6 5 top view ts8 package 8-lead plastic tsot-23 v + outb ?inb +inb outa ?ina +ina v ? + ? + ? t jmax = 150c, q ja = 195c/w (note 6) 1 2 3 4 outa ?ina +ina v ? 8 7 6 5 v + outb ?inb +inb top view ms8 package 8-lead plastic msop + ? + ? t jmax = 150c, q ja = 163c/w (note 6) 1 2 3 4 5 outa ?ina +ina v ? shdna 10 9 8 7 6 v + outb ?inb +inb shdnb top view ms package 10-lead plastic msop + ? + ? t jmax = 150c, q ja = 160c/w (note 6) 1 2 3 4 5 6 7 8 outa ?ina +ina v + +inb ?inb outb nc 16 15 14 13 12 11 10 9 outd ?ind +ind v ? +inc ?inc outc nc top view ms package 16-lead plastic msop + ? + ? + ? + ? t jmax = 150c, q ja = 125c/w (note 6) 1 2 3 6 5 4 top view s6 package 6-lead plastic tsot-23 v + shdn ?in out v ? +in + ? t jmax = 150c, q ja = 192c/w (note 6) p in c on f igur a tion specified temperature range (note 5) ltc6261i/ltc6262i/ltc6263i ............. C 40c to 85c ltc6261h/ltc6262h/ltc6263h ....... C 4 0c to 125c maximum junction temperature .......................... 15 0c storage temperature range .................. C 65c to 150c lead temperature (soldering, 10 sec) ts8, ms8, ms only ............................................... 30 0c ltc6261/ltc6262/ltc6263 626123fa
3 for more information www.linear.com/ltc6261 o r d er i n f or ma tion 5v e lectric a l c h a r a cteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v supply = 5v, v cm = v out = v supply /2, c l = 10pf, v shdn is unconnected. symbol parameter conditions min typ max units v os input offset voltage v cm = v C + 0.3v (pnp region) l C400 C1000 50 400 1000 v v v cm = v + C 0.3v (npn region) l C400 C1000 50 400 1000 v v v os tc input offset voltage drift v cm = v C + 0.3v, v + C 0.3v l 0.4 v/c i b input bias current (note 7) v cm = v C + 0.3v l C100 C150 C60 50 150 na na v cm = v + C 0.3v l C50 C150 10 50 150 na na i os input offset current v cm = v C + 0.3v l C50 C100 2 50 100 na na v cm = v + C 0.3v l C50 C100 2 50 100 na na e n input voltage noise density f = 1khz 13 nv/ hz input noise voltage f = 0.1hz to 10hz 1.25 v p-p tape and reel (mini) tape and reel part marking* package description specified temperature range ltc6261is6#trmpbf ltc6261is6#trpbf ltgwf 6-lead plastic tsot-23 C40c to 85c ltc6261hs6#trmpbf ltc6261hs6#trpbf ltgwf 6-lead plastic tsot-23 C40c to 125c ltc6261idc#trmpbf ltc6261idc#trpbf lgzt 6-lead (2mm 2mm 0.8mm) plastic dfn C40c to 85c ltc6261hdc#trmpbf ltc6261hdc#trpbf lgzt 6-lead (2mm 2mm 0.8mm) plastic dfn C40c to 125c ltc6262its8#trmpbf ltc6262its8#trpbf ltgwk 8-lead plastic tsot-23 C40c to 85c ltc6262hts8#trmpbf ltc6262hts8#trpbf ltgwk 8-lead plastic tsot-23 C40c to 125c ltc6262idc#trmpbf ltc6262idc#trpbf lgwg 8-lead (2mm 2mm 0.8mm) plastic dfn C40c to 85c ltc6262hdc#trmpbf ltc6262hdc#trpbf lgwg 8-lead (2mm 2mm 0.8mm) plastic dfn C40c to 125c ltc6262ims8#pbf ltc6262ims8#trpbf ltgwj 8-lead plastic msop C40c to 85c ltc6262hms8#pbf ltc6262hms8#trpbf ltgwj 8-lead plastic msop C40c to 125c ltc6262ims#pbf ltc6262ims#trpbf ltgwm 10-lead plastic msop C40c to 85c ltc6262hms#pbf ltc6262hms#trpbf ltgwm 10-lead plastic msop C40c to 125c ltc6263ims#pbf ltc6263ims#trpbf 6263 16-lead plastic msop C40c to 85c ltc6263hms#pbf ltc6263hms#trpbf 6263 16-lead plastic msop C40c to 125c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. parts ending with pbf are rohs and weee compliant. for more information on lead free part marking, go to: http://www .linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. http://www.linear.com/product/ltc6261#orderinfo ltc6261/ltc6262/ltc6263 626123fa
4 for more information www.linear.com/ltc6261 5v e lectric a l c h a r a cteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v supply = 5v, v cm = v out = v supply /2, c l = 10pf, v shdn is unconnected. symbol parameter conditions min typ max units i n input current noise density f = 1khz, v cm = 0v to 4v (pnp input) f = 1khz, v cm = 4v to 5v (npn input) 600 600 fa/hz fa/ hz r in input resistance differential common mode 1 10 m m c in input capacitance differential common mode 0.4 0.3 pf pf cmrr common mode rejection ratio v cm = 0.3v to 3.5v l 68 100 db v cm = C0.1v to 5.1v l 70 95 db ivr input voltage range l C0.1 5.1 v psrr power supply rejection ratio v cm = 0.4v, v s ranges from 1.8v to 5v l 80 74 95 db db supply v oltage range l 1.8 5.25 v a v large signal gain v out = 0.5v to 4.5v, r load = 10k l 100 15 200 v /mv v /mv v out = 0.5v to 4.5v, r load = 1k l 30 10 100 v /mv v /mv v ol output swing low (input overdrive 30mv). measured from v C no load l 35 120 mv i sink = 100a l 50 120 mv i sink = 1ma l 100 170 mv v oh output swing high (input overdrive 30mv). measured from v + no load l 60 130 mv i source = 100a l 70 140 mv i source = 1ma l 95 150 mv i sc output short-circuit current l 30 20 40 ma ma i s supply current per amplifier l 215 160 245 265 300 a a supply current in shutdown l 5 7 10 a a i shdn shutdown pin current v shdn = 0.6v v shdn = 1.5v l l 40 C10 150 2 700 130 na na v il shdn input low voltage disable l 0.6 v v ih shdn input high voltage enable l 1.5 v t on turn-on time shdn toggle from 0v to 5v 15 s t off turn-off time shdn toggle from 5v to 0v 6 s gbw gain-bandwidth product f = 200khz l 20 15 30 mhz mhz t s settling time, 0.5v to 4.5v, unity gain 0.1% 0.01% 0.4 0.5 s s sr slew rate a v = C1, v out = 0.5v to 4.5v, c load = 10pf, r f = r g = 10k l 4.5 3.5 7 16 v /s v /s fpbw full power bandwidth (note 8) 4v p-p 560 khz thd+n total harmonic distortion and noise f = 1khz, a v = 2, r l = 4k, v outp-p = 1v v in = 2.25v to 2.75v 0.0012 98 % db i leak output leakage current in shutdown v shdn = 0v, v out = 0v v shdn = 0v, v out = 5v l l C100 C100 100 100 na na ltc6261/ltc6262/ltc6263 626123fa
5 for more information www.linear.com/ltc6261 1.8v e lectric a l c h a r a cteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v supply = 1.8v, v cm = v out = 0.4v, c l = 10pf, v shdn is unconnected. symbol parameter conditions min typ max units v os input offset voltage v cm = v C + 0.3v l C400 C1000 100 400 1000 v v v cm = v + C 0.3v l C400 C1000 100 400 1000 v v v os tc input offset voltage drift v cm = v C + 0.3v, v + C 0.3v l 0.4 v/c i b input bias current (note 7) v cm = v C + 0.3v l C100 C150 C10 100 150 na na v cm = v + C 0.3v l C50 C150 10 50 150 na na i os input offset current v cm = v C + 0.3v l C150 150 na v cm = v + C 0.3v l C150 150 na e n input voltage noise density f = 1khz, v cm = 0.4v 13 nv/ hz input noise voltage f = 0.1hz to 10hz 1.25 v p-p i n input current noise density f = 1khz, v cm = 0v to 0.8v (pnp input) f = 1khz, v cm = 1v to 1.8v (npn input) 600 600 fa/hz fa/ hz r in input resistance differential common mode 1 10 m m c in input capacitance differential common mode 0.4 0.3 pf pf cmrr common mode rejection ratio v cm = 0.2v to 1.6v l 70 62 90 db db ivr input v oltage range l C0.1 1.9 v psrr power supply rejection ratio v cm = 0.4v, v s ranges from 1.8v to 5v l 80 74 95 db db a v large signal gain v out = 0.5v to 1.3v, r load = 10k l 32 10 100 v /mv v /mv v out = 0.5v to 1.3v, r load = 1k l 15 4 35 v /mv v /mv v ol output swing low (input overdrive 30mv), measured from v C no load l 35 50 100 mv mv i sink = 100a l 47 65 100 mv mv i sink = 1ma l 100 150 180 mv mv ltc6261/ltc6262/ltc6263 626123fa
6 for more information www.linear.com/ltc6261 note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the inputs are protected by back-to-back diodes as well as esd protection diodes to each power supply. if the differential input voltage exceeds 3.6v or the input extends more than 500mv beyond the power supply, the input current should be limited to less than 10ma. note 3: a heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted indefinitely. note 4: ltc6261i/ltc6262i/ltc6263i are guaranteed functional over the temperature range of C40c to 125c. the ltc6261h/ltc6262h/ ltc6263h are guaranteed functional over the temperature range of C40c to 125c. 1.8v e lectric a l c h a r a cteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v supply = 1.8v, v cm = v out = 0.4v, c l = 10pf, v shdn is unconnected. symbol parameter conditions min typ max units v oh output swing high (input overdrive 30mv), measured from v + no load l 45 75 100 mv mv i source = 100a l 50 75 100 mv mv i source = 1ma l 80 150 170 mv mv i sc output short-circuit current l 10 4 20 ma ma i s supply current per amplifier l 215 150 240 275 300 a a supply current in shutdown l 1.5 2.5 4 a a i shdn shutdown pin current v shdn = 0.5v v shdn = 1.3v l l 10 C10 80 0 200 10 na na v il shdn input low voltage disable l 0.6 v v ih shdn input high voltage enable l 1.3 v t on turn-on time shdn toggle from 0v to 1.8v 20 s t off turn-off time shdn toggle from 1.8v to 0v 12 s gbw gain-bandwidth product f = 200khz l 20 15 28 mhz mhz t s settling time, 0.3v to 1.5v, unity gain 0.1% 0.01% 0.2 0.3 s s sr slew rate a v = C1, v out = 0.3v to 1.5v, c load = 10pf r f = r g = 10k 6.5 v/s fpbw full power bandwidth (note 8) 1.2v p-p 1725 khz thd+n total harmonic distortion and noise f = 1khz, a v = 2, r l = 4k, v outp-p = 1v v in = 0.65v to 1.15v 0.025 76 % db no te 5: the ltc6261i/ltc6262i/ltc6263i are guaranteed to meet specified performance from C40c to 85c. the ltc6261h/ltc6262h/ ltc6263h are guaranteed to meet specified performance from C40c to 125c. note 6: thermal resistance varies with the amount of pc board metal connected to the package. the specified values are for short traces connected to the leads. note 7: the input bias current is the average of the currents through the positive and negative input pins. note 8: full power bandwidth is calculated from the slew rate fpbw = sr/ ? v p-p . ltc6261/ltc6262/ltc6263 626123fa
7 for more information www.linear.com/ltc6261 t ypic a l p er f or ma nce c h a r a cteristics v os t c (C40c to 125c) v os vs supply voltage (25c) v os vs common mode voltage v os vs i out input bias current vs common mode voltage input bias current vs common mode voltage input v os histogram input v os histogram v os vs temperature v s = 2.5v v cm = 0v ltc6261/ltc6262/ltc6263 626123fa v s = 2.5v 250 40 60 80 100 v os (v) 626123 g05 v s = 5v v cm (v) ?0.5 0.5 350 1.5 2.5 3.5 4.5 5.5 ?500 ?400 ?300 ?200 ?100 0 0 100 200 300 400 500 v os (v) 626123 g06 v s = 2.5v v cm = 0v 10 125c 25c ?40c i out (ma) 5 4 3 2 1 0 ?1 20 ?2 ?3 ?4 ?5 ?1 ?0.8 ?0.6 ?0.4 ?0.2 0 30 0.2 0.4 0.6 0.8 1.0 v os (mv) 626123 g07 v s = 5v v cm (v) ?0.5 40 0.5 1.5 2.5 3.5 4.5 5.5 ?1000 ?800 ?600 ?400 50 ?200 0 200 400 600 800 1000 input bias current (na) 626123 g08 +in number of parts ?in v s = 1.8v +in ?in v cm (v) 0 0.3 0.6 0.9 1.2 626123 g01 1.5 1.8 ?4 ?3 ?2 ?1 0 1 2 input bias current (a) v cm = 0v v s = 2.5v 626123 g09 v cm = 2.2v v os (v) ?350 ?250 ?150 ?50 50 150 250 v os (v) 350 0 10 20 30 40 50 number of parts 626123 g02 temperature (c) ?350 ?40 ?25 ?10 5 20 35 50 65 80 95 ?250 110 125 ?100 ?80 ?60 ?40 ?20 0 20 40 ?150 60 80 100 v os (v) 626123 g03 distribution (v/c) ?0.5 ?0.3 ?0.1 0.1 ?50 0.3 0.5 0 3 6 9 12 15 number of units 626123 g04 50 hgrade ind v s = 2.5v v cm =0v v cm = 0.4v supply voltage (v) 1.8 2.4 3.0 3.6 150 4.2 4.8 5.4 ?100 ?80 ?60 ?40 ?20 0 20
8 for more information www.linear.com/ltc6261 t ypic a l p er f or ma nce c h a r a cteristics supply current vs temperature output saturation voltage vs load current (output high) output saturation voltage vs load current (output low) output short-circuit current vs supply voltage (sourcing) output short-circuit current vs supply voltage (sinking) 0.1hz to 10hz output voltage noise input bias current vs supply voltage input bias current vs temperature supply current vs supply voltage per channel v cm = 2v; i b ? v cm = 2v; i b + v cm = 2v; i b ? v cm = 2v; i b + t a = 125c t a = 25c t a = ?40c v s = 1.8v v s = 5v t a = ?40c t a = 25c t a = 125c ltc6261/ltc6262/ltc6263 626123fa 3.8 2 3 4 5 ?250 ?200 ?150 ?100 ?50 0 4.3 saturation voltage from top rail (mv) 6261 g14 v s = 1.8v/25c v s = 1.8v/125c v s = 1.8v/85c v s = 1.8v/?40c v s = 5v/25c v s = 5v/125c v s = 5v/85c v s = 5v/?40c 4.8 load current (ma) 0 0.5 1 1.5 2 2.5 3 3.5 4 5.3 4.5 5 0 50 100 150 200 250 saturation voltage from bottom rail (mv) 6261 g15 ?50 v cm = 0.4v t a = 25c t a = 125c t a = ?40c supply voltage (v) 1.8 2.4 3.0 ?40 3.6 4.2 4.8 5.4 0 10 20 30 40 50 ?30 60 70 80 90 100 maximum sourcing current (ma) 6261 g16 v cm = 0.4v supply voltage (v) 1.8 ?20 2.4 3.0 3.6 4.2 4.8 5.4 0 10 20 30 ?10 40 50 maximum sinking current (ma) 626123 g17 v s = 2.5v v cm = 0v a v = 1 time (s) 0 1 0 2 3 4 5 6 7 8 9 10 ?5 v cm = 0.4v 10 ?4 ?3 ?2 ?1 0 1 2 3 4 5 20 noise voltage (v) 626123 g18 30 40 50 input bias current (na) 6261 g10 v s = 2.5v temperature (c) ?40 + i bias (na) ?25 ?10 5 20 35 50 65 80 95 110 ? i bias (na) 125 ?50 ?40 ?30 ?20 ?10 0 10 20 30 supply voltage (v) 40 50 input bias current (na) 6262 g11 v s = 5v v cm = 0.4v supply voltage (v) 0 1 2 1.8 3 4 5 0 50 100 150 200 250 300 2.3 supply current (a) 6261 g12 v cm = 0.4v temperature (c) ?50 ?20 10 40 70 100 2.8 130 150 180 210 240 270 300 supply current (a) 6261 g13 v s = 1.8v/25c 3.3 v s = 1.8v/125c v s = 1.8v/85c v s = 1.8v/?40c v s = 5v/25c v s = 5v/125c v s = 5v/85c v s = 5v/?40c load current (ma) 0 1
9 for more information www.linear.com/ltc6261 t ypic a l p er f or ma nce c h a r a cteristics total harmonic distortion and noise total harmonic distortion and noise gain and phase vs frequency noise voltage density vs frequency noise voltage density vs frequency input referred current noise vs frequency slew rate vs supply voltage common mode rejection ratio vs frequency power supply rejection ratio vs frequency ltc6261/ltc6262/ltc6263 626123fa v s = 2.5v 0 100 ?100 ?50 0 50 100 150 ?25 0 25 10 50 75 100 amplitude (db) phase 626123 g24 v step = v s ? 1v r f = r g =10k a v = ?1 rising edge(v/s) 20 falling edge(v/s) supply voltage v s (v) 1.8 2.6 3.4 4.2 5 0 3 6 30 9 12 15 18 slew rate (v/s) 626123 g25 v s = 2.5v v cm = 0v frequency (mhz) 0.01 40 0.1 1 10 100 0 10 20 30 40 50 50 60 70 80 90 100 cmrr (db) 626123 g26 vs = 2.5v v cm = 0v frequency (mhz) 60 0.001 0.01 0.1 1 10 100 0 10 20 30 70 40 50 60 70 80 90 100 psrr (db) 626123 g27 80 90 v cm = 0v 100 input referred voltage noise density (nv/ hz) 6261 g19 v s = 2.5v v cm = 0v frequency (hz) 100k 1m 10m 100m frequency (hz) 0 10 20 30 40 50 60 70 80 90 10 100 noise density (nv/ hz) input referred voltage 626123 g20 v s = 2.5v v cm = 0v frequency (hz) 100k 1m 0.01 100 0.1 1 10 input referred current noise (pa/hz) 626123 g21 v s = 0.9v v cm = 0v a v = 2 r g = r f = 10k 500hz 1k 1khz 5khz v outp?p (v) 0.01 0.1 1 10 0.001 0.01 0.1 10k 1 thd+n (%) 626123 g22 v s = 2.5v v cm = 0 a v = 2 r f = r g = 10k 1khz 5khz v outp?p (v) 100k 0.01 0.1 1 10 0.0001 0.001 0.01 0.1 1 thd+n (%) 1m 626123 g23 v s = 2.5v v cm =0v gain phase freqeuncy (mhz) 0.01 0.1 1 10
10 for more information www.linear.com/ltc6261 t ypic a l p er f or ma nce c h a r a cteristics large signal response output impedance vs frequency capacitive load handling overshoot vs capacitive load large signal response small signal response supply current vs shdn pin voltage small signal response supply current vs shdn pin voltage ltc6261/ltc6262/ltc6263 626123fa 0 ?0.50 ?0.25 0 0.25 0.50 0.75 1.00 voltage (v) 6262 g31 v s = 0.9v 3 a v =1 r load =10k c load = 10pf c load = 100pf c load = 1nf time (s) 0 10 20 30 6 40 50 60 70 80 90 100 ?100 ?80 ?60 9 ?40 ?20 0 20 40 60 80 100 voltage (mv) 626123 g32 12 v s = 2.5v v cm = 0v a v = 1 a v = 10 frequnecy (mhz) 10 ?5 10 ?4 10 ?3 10 ?2 10 ?1 15 1 10 0.001 0.01 0.1 1 10 100 1k output impedance () overshoot (%) 626123 g33 v s = 1.8v v cm = 0.4v t a = 125c t a = 25c t a = ?40c v shdn (v) 0 0.2 0.4 626123 g28 0.6 0.8 1 1.2 1.4 1.6 1.8 0 50 100 v s = 2.5v 150 200 250 300 supply current (a) 626123 g34 v s = 5v v cm = 0.4v t a = 125c t a = 25c a v = 1 t a = ?40c v shdn (v) 0 0.2 0.4 0.6 0.8 1 1.2 1.4 v s = 2.5v r load = 10k 1.6 1.8 0 50 100 150 200 250 300 supply current (a) c load = 10pf 626123 g35 c load = 100pf c load = 1nf time (s) 0 10 20 30 40 v cm = 0 50 60 70 80 90 100 ?2.5 ?2.0 ?1.5 ?1.0 a v = 1 ?0.5 0 0.5 1.0 1.5 2.0 2.5 voltage (v) 626123 g29 v s = 2.5v v in = 2v a v = 1 r load = 10k c load = 10pf c load = 100pf c load = 1nf time (s) 0 10 20 30 c load (nf) 40 50 60 70 80 90 100 ?100 ?80 ?60 0.01 ?40 ?20 0 20 40 60 80 100 voltage (mv) 626123 g30 0.1 v s = 0.9v a v =1 r load =10k c load = 10pf c load = 100pf c load = 1nf time (s) 0 10 20 1 30 40 50 60 70 80 90 100 ?1.00 ?0.75
11 for more information www.linear.com/ltc6261 p in functions Cin: inverting input of the amplifier. voltage range of this pin can go from v C C 0.1v to v + + 0.1v. +in: non-inverting input of amplifier. this pin has the same voltage range as Cin. v + : positive power supply. typically the voltage range spans from 1.8v to 5.25v. split supplies are possible as long as the voltage between v + and v C is between 1.8v and 5.25v. a bypass capacitor of 0.1f as close to the part as possible should be used between power supply pins in single supply applications or between supply pins and ground in split supply applications. v C : negative power supply. it is normally tied to ground. it can also be tied to a voltage other than ground as long as the voltage between v + and v C is from 1.8v to 5.25v. if it is not connected to ground, bypass it with a capacitor of 0.1f as close to the part as possible. shdn: active low shutdown. shutdown threshold is 0.6v above negative rail. if left unconnected, the amplifier will be on. ou t: amplifier output. rail-to-rail amplifier output capable of delivering greater than 10ma s i m pli f ie d s che ma tic figure 1. ltc6261/ltc6262/ltc6263 simplified schematic + i2 q17 q18 esdd4 ?in +in v ? q3q4 q6 q8 r2 r4 q9 q12 r1 r3 r6 5m q7 q16 esdd3 v + esdd1 v + esdd2 v ? v ? v + shdn v ? d8 d7 esdd5 esdd6 d6 d5 q2 q5 v bias q1 + i1 i3 q19 r5 q11 q10 q13 q15 out c2 c1 + q14 c c buffer and output bias 626123 f01 logic ltc6261/ltc6262/ltc6263 626123fa
12 for more information www.linear.com/ltc6261 o per a tion applic a tions i n f or ma tion the ltc6261 family input signal range extends slightly beyond the negative and positive power supplies. the output can even extend all the way to the negative supply with the proper external pull-down current source. figure 1 depicts a simplified schematic of the amplifier. the input stage is comprised of two differential amplifiers, a pnp stage q1/q2 and npn stage q3/q4 that are active over different ranges of common mode input voltage. the pnp stage is active between the negative power supply to approximately 1v below the positive supply. as the input voltage approaches the positive supply, transistor q5 will steer the tail current i1 to the current mirror q6/ q7, activating the npn differential pair and the pnp pair becomes inactive for the remaining input common mode range. also for the input stage, devices q17, q18 and q19 act to cancel the bias current of the pnp input pair. when q1/q2 is active, the current in q16 is controlled to be the same as the current q1/q2. thus, the base current of q16 is normally equal to the base current of the input devices of q1/q2. similar circuitry (not shown) is used to cancel the base current of q3/q4. the buffer and output bias stage uses a special compensation technique to take full advantage of the process technology to drive high capacitive loads. the common emitter topology of q14/ q15 enables the output to swing from rail-to-rail. low supply voltage and low power consumption the ltc6261 family of operational amplifiers can oper - ate with power supply voltages from 1.8v to 5.25v. each amplifier draws 240a. the low supply voltage capability and low supply current are ideal for portable applications. high capacitive load driving capability and wide bandwidth the ltc6261 family is optimized for wide bandwidth and low power applications. they have an extremely high gain-bandwidth to power ratio and are unity gain stable (see typical performance characteristics, capacitive load handling). higher gain configurations tend to have better capacitive drive capability than lower gain configurations due to lower closed loop bandwidth and hence higher phase margin. low input referred noise the ltc6261 family provides a low input referred noise of 13nv/ hz at 10khz. the average noise voltage density over 1mhz of bandwidth is less than 15nv/ hz . the ltc6261 family is ideal for low noise and low power signal process - ing applications. low input offset voltage the l tc6261 family has a low offset voltage of 1mv maxi - mum. the offset voltage is trimmed with a proprietary algorithm to ensure low offset voltage over the entire common mode voltage range. low input bias current the ltc6261 family uses a bias current cancellation cir cuit to compensate for the base current of the input transistors. when the input common mode voltage is within 200mv of either rail, the bias cancellation circuit is no longer active. for common mode voltages ranging from 0.2v above the negative supply to 0.2v below the positive supply, the low input bias current allows the amplifiers to be used in applications with high resistance sources. ground sensing and rail-to-rail output the ltc6261 family has excellent output drive capability, delivering over 10ma of output drive current. the output stage is a rail-to-rail topology that is capable of swinging to within 250mv of either rail. if output swing to the negative rail is required, an external pull down resistor to a negative supply can be added. for 5v/0v op amp supplies, a pull ltc6261/ltc6262/ltc6263 626123fa
13 for more information www.linear.com/ltc6261 down resistor of 1k to C2v will allow a true zero output swing. in this case, the output can swing all the way to the bottom rail while maintaining 50db of open loop gain. since the inputs can go 100mv beyond either rail, the op amp can easily perform true ground sensing. the maximum output current is a function of total supply voltage. as the supply voltage to the amplifier increases, the output current capability also increases. attention must be paid to keep the junction temperature of the ic below 150c when the output is in continuous short-circuit. the output of the amplifier has reverse-biased diodes con - nected to each supply. the output should not be forced more than 0.5v beyond either supply; other wise current will flow through these diodes. input protection and output overdrive t o prevent breakdown of the input transistors, the input stages are protected against a large differential input voltage by two pairs of back-to-back diodes, d5 to d8. if the differential input voltage exceeds 1.4v, the current in these diodes must be limited to less than 10ma. these amplifiers are not intended for open loop applications such as comparators. when the output stage is overdriven, internal limiting circuitry is activated to improve overdrive recovery. in some applications, this circuitry may draw as much as 1ma supply current. esd the ltc6261 family has reverse-biased esd protection diodes on all inputs and output as shown in figure 1. supply voltage ramping fast ramping of the supply voltage can cause a current glitch in the internal esd protection circuits. depending on the supply inductance, this could result in a supply volt - age transient that exceeds the maximum rating. a supply voltage ramp time of greater than 1ms is recommended. feedback components care must be taken to ensure that the pole formed by the feedback resistors and the parasitic capacitance at the inverting input does not degrade stability. for example, in a gain of +2 configuration with gain and feedback resis - tors of 10k, a poorly designed cir cuit board layout with parasitic capacitance of 5pf (part +pc board) at the ampli - fiers inverting input will cause the amplifier to oscillate due to a pole formed at 3.2mhz. an additional capacitor of 4.7pf across the feedback resistor as shown in figure 2 will eliminate any ringing or oscillation. shutdown the single and dual versions have shdn pins that can shut down the amplifier to less than 10a supply current. the shdn pin voltage needs to be within 0.6v of v C for the amplifier to shut down. during shutdown, the output is in high impedance state. when left floating, the shdn pin is internally pulled up to the positive supply and the amplifier remains enabled. 10k 10k 4.7pf c par v out v in 626123 f02 + ? ltc6261 figure 2. applic a tions i n f or ma tion ltc6261/ltc6262/ltc6263 626123fa
14 for more information www.linear.com/ltc6261 t ypic a l applic a tions driving a sar the circuit next uses a traditional noninverting gain con - figuration to map a ground referenced input voltage signal to the full scale of a 500ks/s, 12 bit l tc2362 adc. this application takes advantage of the l tc6261 familys com - bination of excellent common mode rejection, bandwidth, supply current, and noise to enable high performance adc at low dissipation. the high bandwidth and open loop gain c ombine to provide good distortion performance given the low supply current usage. the capacitor cf1 can be used as needed to improve phase margin if there is any peak - ing in the closed loop response due to total capacitance seen at the input terminals of the op amp as mounted on a pcb. the resistors should be chosen to minimize add - ing excessive noise while at the same time minimizing total current consumption and avoiding distortion due to overloading the amplifier. the choice of resistor , then, will be commensurate with the input noise voltage and noise current of the ltc6261. use of an output filter is critical in reducing noise and spurious high frequency content that might alias. ? + ltc6261 3.3v u1 in out 626123 ta03 rf1 1.74k rf2 2.74k cf1 10pf r filt 100 c filt 10nf 3.3v ltc2362 gnd cs sdo sck ov dd a in v dd v ref sar adc driver ltc6261 driving ltc2362 adc ltc6261 driving ltc2362 adc current consumption of the op amp circuit is 560a at 3.3v supply with the output centered at 1.65v. increasing the resistors with the same scaling factor will lower the total consumption at the expense of more resistor noise. 626123 ta04 results are shown with a 12 bit ltc2362 sar adc running at both 500k samples and 250k samples. in both cases, the enob is about 11.5. active filters second order bessel filter ample bandwidth and low supply current allows deploy - ment of active filters in portable and other low power applications. the second order bessel filter provides a traditionally clean transient response. ltc6261/ltc6262/ltc6263 626123fa 50 75 100 125 ?120 ?110 ?100 ?90 ?80 ?70 v in = ?1dbfs, 5khz ?60 ?50 ?40 ?30 ?20 ?10 0 magnitude (db) 626123 ta04a v in = ?1dbfs, 5khz f s = 500ksps f s = 250ksps snr = 72db thd = ?83.6db sfdr = 86db frequency (khz) 0 10 20 30 40 snr = 71.5db 50 60 ?120 ?110 ?100 ?90 ?80 ?70 ?60 ?50 thd = ?83.6db ?40 ?30 ?20 ?10 0 magnitude (db) sfdr = 86db frequency (khz) 0 25
15 for more information www.linear.com/ltc6261 t ypic a l applic a tions ltc6261 second order butterworth frequency response ltc6261 third order butterworth frequency response bessel filter response ? + ltc6261 3.3v u1 out in 626123 ta05 r2 15.4k r3 15.4k c2 47pf c1 150pf v ref r1 15.4k supply current consumption is around 230a. the values of resistors chosen minimize consumption at the expense of noise. the frequency response shows an expected roll-off of two poles along with a gentle droop near the 3db point; the transient response is very clean. third order butterworth filter maximally flat magnitude response in the pass-band arises from use of a butterworth filter. a third r-c stage is added in front of the filter in order to maximize the roll-off for a single amplifier circuit. ? + ltc6261 3.3v u1 out in 626123 ta08 r7 15.4k r6 5.54k c5 47pf c4 470pf c3 470pf v ref r5 7.7k r4 7.7k supply current consumption is around 235a. the values of resistors chosen minimize consumption at the expense of noise. ltc6261/ltc6262/ltc6263 626123fa frequency (mhz) ?40.0 ?30.0 ?20.0 ?10.0 0 10.0 gain (db) 626123 ta06 1v p-p 10s/div 0.001 1.0 1.5 2.0 2.5 3.0 3.5 4.0 output voltage (v) 626123 ta07 frequency (mhz) 0.01 0.001 0.01 0.1 1 2 ?70.0 ?60.0 ?50.0 ?40.0 ?30.0 0.1 ?20.0 ?10.0 0 10.0 gain (db) 626123 ta09 1 4 ?70.0 ?60.0 ?50.0
16 for more information www.linear.com/ltc6261 t ypic a l applic a tions butterworth filter response the frequency response shows an expected roll-off of three poles, an extended plateau, and a sharp roll-off; the transient response includes a small amount of ringing. bridge-tied differential output amplifier the low supply current at the bandwidth and noise per - formance allows for excellent fidelity at a fraction of the usual dissipation in portable audio equipment. ? + ltc6261 u2 c2 r3 4.99k c5 1nf c3 100pf c4 100pf r8 4.99k r speaker 120 r6 4.7 r2 10k r9 4.7 r1 10k r7 15k 10f 3v v m v inv1 v in v inv2 noise filter gain stage, output drive inversion stage, output drive ac coupled input 626123 ta11 ? + ltc6261 u1 3v v m audio headphones bridge driver headphone speaker impedances range from 32 to 300; their responsivity, from 80db to 100db spl per 1mw and beyond. as an example, considering a headphone speaker with 90dbspl per 1mw, it takes 100mw to reach 110dbspl. with 32, the rms current is 56ma and voltage 1.8v; with 120, 29ma and 3.5v. given a 3.3v supply and the output of one ltc6261 am - plifier there may not be sufficient drive capability to yield 100mw . however , the combination of two 180 degree phased amplifiers is enough to provide the necessary drive voltage or current to reach upwards of 100mw. duplication of this bridge drive circuit enables power to both left and right sides. the ltc6263 provides four amplifiers in one small package. data from a two-amplifier ltc6262 driving what could be left or right is shown below. basic current consumption of the two amplifiers, with as much as 1v p-p input but no load, is 500a. ltc6261/ltc6262/ltc6263 626123fa 4.0 output voltage (v) 626123 ta10 1v p-p 10s/div 1.0 1.5 2.0 2.5 3.0 3.5
17 for more information www.linear.com/ltc6261 t ypic a l applic a tions the circuit consists of first an inverting gain stage with closed loop gain = 3, and a subsequent inverting stage. the combination of inverting stages produces a single- ended input to differential output gain of 6. with 1v p-p single-ended input, the output is 6v p-p differential, or 3v max (2.1v rms). with 100, 1v leads to 45mw delivered power. 50 100 300 no load ltc6262 bridge driver thd and noise with different loads vs frequency ltc6262 bridge driver thd and noise with different loads vs amplitude at 1khz despite the low quiescent current, this driver delivers low distortion to a headphone load. at high enough amplitude, distortion increases dramatically as the op amp output clips. clipping occurs sooner with more loading as the output transistors start to run out of current gain. ltc6261/ltc6262/ltc6263 626123fa input = 500mv p-p 0.4 0.5 0.6 0.7 0.8 0.9 1.0 thd + noise (%) 626123 ta12 input at 1 khz frequency (khz) no load 300 100 50 audio input amplitude (v) 0.001 0.01 0.1 1 2 0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.0 thd + noise (%) 626123 ta12a 10 0 0.1 0.2 0.3
18 for more information www.linear.com/ltc6261 pa ck a ge description 1.50 ? 1.75 (note 4) 2.80 bsc 0.30 ? 0.45 6 plcs (note 3) datum ?a? 0.09 ? 0.20 (note 3) s6 tsot-23 0302 2.90 bsc (note 4) 0.95 bsc 1.90 bsc 0.80 ? 0.90 1.00 max 0.01 ? 0.10 0.20 bsc 0.30 ? 0.50 ref pin one id note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.62 max 0.95 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref s6 package 6-lead plastic tsot-23 (reference ltc dwg # 05-08-1636) please refer to http://www.linear.com/product/ltc6261#packaging for the most recent package drawings. ltc6261/ltc6262/ltc6263 626123fa
19 for more information www.linear.com/ltc6261 pa ck a ge description please refer to http://www.linear.com/product/ltc6262#packaging for the most recent package drawings. 2.00 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (wccd-2) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom view?exposed pad 0.60 0.10 (2 sides) 0.75 0.05 r = 0.125 typ r = 0.05 typ 1.37 0.10 (2 sides) 1 3 64 pin 1 bar top mark (see note 6) 0.200 ref 0.00 ? 0.05 (dc6) dfn rev c 0915 0.25 0.05 0.50 bsc 0.25 0.05 1.37 0.10 (2 sides) recommended solder pad pitch and dimensions 0.60 0.10 (2 sides) 1.15 0.05 0.70 0.05 2.55 0.05 package outline 0.50 bsc pin 1 notch r = 0.20 or 0.25 45 chamfer dc6 package 6-lead plastic dfn (2mm 2mm) (reference ltc dwg # 05-08-1703 rev c) ltc6261/ltc6262/ltc6263 626123fa
20 for more information www.linear.com/ltc6261 pa ck a ge description please refer to http://www.linear.com/product/ltc6261#packaging for the most recent package drawings. 2.00 0.10 (4 sides) note: 1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom view?exposed pad 0.64 0.10 (2 sides) 0.75 0.05 r = 0.115 typ r = 0.05 typ 1.37 0.10 (2 sides) 1 4 8 5 pin 1 bar top mark (see note 6) 0.200 ref 0.00 ? 0.05 (dc8) dfn 0409 reva 0.23 0.05 0.45 bsc 0.25 0.05 1.37 0.05 (2 sides) recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.64 0.05 (2 sides) 1.15 0.05 0.70 0.05 2.55 0.05 package outline 0.45 bsc pin 1 notch r = 0.20 or 0.25 45 chamfer dc8 package 8-lead plastic dfn (2mm 2mm) (reference ltc dwg # 05-08-1719 rev a) ltc6261/ltc6262/ltc6263 626123fa
21 for more information www.linear.com/ltc6261 pa ck a ge description 1.50 ? 1.75 (note 4) 2.80 bsc 0.22 ? 0.36 8 plcs (note 3) datum ?a? 0.09 ? 0.20 (note 3) ts8 tsot-23 0710 rev a 2.90 bsc (note 4) 0.65 bsc 1.95 bsc 0.80 ? 0.90 1.00 max 0.01 ? 0.10 0.20 bsc 0.30 ? 0.50 ref pin one id note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.40 max 0.65 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref ts8 package 8-lead plastic tsot-23 (reference ltc dwg # 05-08-1637 rev a) please refer to http://www.linear.com/product/ltc6262#packaging for the most recent package drawings. ltc6261/ltc6262/ltc6263 626123fa
22 for more information www.linear.com/ltc6261 pa ck a ge description please refer to http://www.linear.com/product/ltc6262#packaging for the most recent package drawings. msop (ms8) 0213 rev g 0.53 0.152 (.021 .006) seating plane note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.18 (.007) 0.254 (.010) 1.10 (.043) max 0.22 ? 0.38 (.009 ? .015) typ 0.1016 0.0508 (.004 .002) 0.86 (.034) ref 0.65 (.0256) bsc 0 ? 6 typ detail ?a? detail ?a? gauge plane 1 2 3 4 4.90 0.152 (.193 .006) 8 7 6 5 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) 0.52 (.0205) ref 5.10 (.201) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.42 0.038 (.0165 .0015) typ 0.65 (.0256) bsc ms8 package 8-lead plastic msop (reference ltc dwg # 05-08-1660 rev g) ltc6261/ltc6262/ltc6263 626123fa
23 for more information www.linear.com/ltc6261 pa ck a ge description please refer to http://www.linear.com/product/ltc6261#packaging for the most recent package drawings. msop (ms) 0213 rev f 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 ?0.27 (.007 ? .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 1 2 3 4 5 4.90 0.152 (.193 .006) 0.497 0.076 (.0196 .003) ref 8910 7 6 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.254 (.010) 0 ? 6 typ detail ?a? detail ?a? gauge plane 5.10 (.201) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc 0.1016 0.0508 (.004 .002) ms package 10-lead plastic msop (reference ltc dwg # 05-08-1661 rev f) ltc6261/ltc6262/ltc6263 626123fa
24 for more information www.linear.com/ltc6261 pa ck a ge description please refer to http://www.linear.com/product/ltc6262#packaging for the most recent package drawings. msop (ms16) 0213 rev a 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 ?0.27 (.007 ? .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 16151413121110 1 2 3 4 5 6 7 8 9 note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.254 (.010) 0 ? 6 typ detail ?a? detail ?a? gauge plane 5.10 (.201) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc 4.039 0.102 (.159 .004) (note 3) 0.1016 0.0508 (.004 .002) 3.00 0.102 (.118 .004) (note 4) 0.280 0.076 (.011 .003) ref 4.90 0.152 (.193 .006) ms package 16-lead plastic msop (reference ltc dwg # 05-08-1669 rev a) ltc6261/ltc6262/ltc6263 626123fa
25 for more information www.linear.com/ltc6261 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r e v ision h istory rev date description page number a 07/17 added ltc6261 tsot-23 6-lead package corrected i s value corrected supply current in shutdown corrected i b 1 to 3, 18 4 1, 4, 13 5 ltc6261/ltc6262/ltc6263 626123fa
26 for more information www.linear.com/ltc6261 lt 0717 rev a ? printed in usa www.linear.com/ltc6261 ? linear technology corporation 2016 t ypic a l applic a tion r el a te d pa rts part number description comments ltc6255/ltc6256/ ltc6257 6.5mhz, 65a power efficient rr op amp 6.5mhz, 65a, rr in/out, 1.8v to 5.25v ltc6246/ltc6247/ ltc6248 180mhz, 1ma, power efficient rail-to-rail op amps 180mhz gbw, 1ma, 500v v os , rr in/out, 2.5v to 5.25v, 90v/s slew rate l t1498/l t1499 10mhz, 6v/s, dual/quad,rail-to-rail input and output, precision c-load op amps 10mhz gbw, 1.7ma, 475v v os , rr in/out, 2.2v to 15v, 10nf c load ltc6081/ltc6082 precision dual/quad cmos rail-to-rail input/output amplifiers 3.6mhz gbw, 330a, 70v v os , rr in/out, 2.7v to 5.5v, 100db cmrr ltc2050/ltc2051/ ltc2052 zero-drift operational amplifiers in sot-23 3mhz gbw, 800a, 3v v os , v C to v + C 1v in, rr out, 2.7v to 6v, 130db cmrr/psrr ltc1050/ltc1051/ ltc1052 precision zero-drift, operational amplifierwith internal capacitors 2.5mhz gbw, 1ma, 5v v os , v C to v + C 2.3v in, rr out, 4.75v to 16v, 120db cmrr, 125db psrr ltc6084/ltc6085 dual/quad 1.5mhz, rail-to-rail, cmos amplifiers 1.5mhz gbw, 110a, 750v v os , rr in/out, 2.5v to 5.5v lt1783 1.25mhz, over-the-top ? micropower, rail-to-rail input and output op amp in sot-23 1.25mhz gbw, 300a, 800v v os , rr in/out, 2.5v to 18v lt1637/lt1638/ lt1639 1.1mhz, 0.4v/s over-the-top micropower, rail-to-rail input and output op amps 1.1mhz gbw, 250a, 350v v os , rr in/out, 2.7v to 44v, 110db cmrr ltc2054/ltc2055 single/dual micropower zero-drift operational amplifiers 500khz gbw, 150a, 3v v os , v C to v + C 0.5v in, rr out, 2.7v to 6v lt6010/lt6011/ lt6012 135a, 14nv/ hz, rail-to-rail output precision op amp with shutdown 330khz gbw, 135a, 35v v os , v C + 1.0v to v + C 1.2v in, rr out, 2.7v to 36v l t1782 micropower , over-the-top, sot-23, rail-to-rail input and output op amp 200khz gbw, 55a, 800v v os , rr in/out, 2.5v to 18v lt1636 over-the-top, micropower rail-to-rail, input and output op amp 200khz gbw, 50a, 225v v os , rr in/out, 2.7v to 44v, C40c to 125c lt1490a/lt1491a dual/quad over-the-top, micropower rail-to-rail input and output op amps 200khz gbw, 50a, 500v v os , rr in/out, 2v to 44v lt2178/lt2179 17a max, dual and quad, single supply, precision op amps 85khz gbw , 17a, 70v v os , rr in/out, 5v to 44v LT6000/lt6001/ lt6002 single, dual and quad, 1.8v, 13a precision rail-to-rail op amps 50khz gbw, 16a , 600v v os(max) , rr in/out, 1.8v to 18v bridge-tied differential output amplifier ? + ltc6261 u2 c2 r3 4.99k c5 1nf c3 100pf c4 100pf r8 4.99k r speaker 120 r6 4.7 r2 10k r9 4.7 r1 10k r7 15k 10f 3v v m v inv1 v in v inv2 noise filter gain stage, output drive inversion stage, output drive ac coupled input 626123 ta06 ? + ltc6261 u1 3v v m ltc6261/ltc6262/ltc6263 626123fa

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